Quantum Devices


Quantum effects due to 2-dimensional or 1-dimensional carrier confinement have been observed. In 2D devices (GAA) transistors, transconductance oscillations have been found. In 1D quantum wire-based MOSFETs, current oscillations (as a function of gate voltage) have been observed.


Here's the geometry of a 2D GAA MOSFET and a 1D SOI quantum wire transistor. The thickness of the GAA devices is either 40 or 80 nm, and the section of the quantum wires is 100 x 85 nm.



For a nice SEM micrograph of the quantum wire, go to Xavier Baie's page


The next graph shows the result of a simulation (self-consistent solving of Poisson and Schrödinger equations). It represents the evolution of the electron concentration in a GAA transistor as a funtion of the depth in the silicon film and as a function of the gate voltage. At first, volume inversion is observed, and then, for higher gate voltages, 2 channels form (at the front and the back interfaces).


Oscillations of the transconductance curves are observed at low temperature (300 mK). These oscillations are due to subband splitting. More subbands are found in thicker silicon films, and, therefore, more oscillations are found. The "E's" in the figure below represent filling of different energy levels as the gate voltage increases.


This is the current as a function of gate voltage (at different temperatures) measured in the quantum wire. Here again, the oscillations are due to filling of different subbands when the gate voltage is increased.


References



"One-dimensional and two-dimensional phenomena in silicon-on-insulator (SOI) MOSFET devices", X. Baie, J.P. Colinge, V. Bayot and E. Grivei, Abstracts of the 9-th International Conference on Supperlatices, Microstructures and Microdevices, p.FrB-4, 1996

"Dual-gate SOI MOSFETs: physics and potential" (invited), J.P. Colinge, in "Silicon-on-Insulator Technology and Devices", P.L.F. Hemment, S. Cristoloveanu, K. Izumi, T. Houston and S. Wilson Editors, Electrochemical Society Proceedings Vol. 96-3, pp. 271-286, 1996

"A silicon-on-insulator quantum wire", J.P. Colinge, X. Baie, V. Bayot, E. Grivei, Solid-State Electronics, Vol. 39, pp. 49-51, 1996

"Quantum-wire effects in thin and narrow SOI MOSFETs", X. Baie, J.P. Colinge, V. Bayot and E. Grivei, IEEE International SOI Conference, 1995

"Some properties of SOI Gate-all-Around devices", P. Francis, X.Baie and J.P. Colinge, Extended Abstracts of the International Conference on Solid-State Devices and materials (SSDM), pp. 277-279, Yokohama, Japan, Aug. 1994

"Evidence of two-dimensional carrier confinement in thin n-channel gate-all-around (GAA) devices", J.P. Colinge, X. Baie and V. Bayot, IEEE Electron Device Letters, vol. 15, p. 193, 1994


Back to the UCL SOI home page

Goto : UCL | FSA | ELEC | DICE

Last modified : 28/05/99 11:24 +0200
Send any comment to : Adriaensen@dice.ucl.ac.be