SOI technology allows one to make microwave (C)MOS transistors using the same process as
regular analog or digital CMOS circuits. These microwave transistors can operate under low
voltage. Look below for some examples...
Current gain (H21), Maximum Available Gain (MAG) and Unilateral Gain (ULG) of an SOI
nMOSFET (L=0.75 µm) under a 0.9 V supply voltage.
fT and Fmax and dc power consumption of an SOI nMOSFET (L=0.75 µm) as a function of
supply voltage
The variation of the minimum noise figure and the associated gain as a function
of frequency of a 20 x25/0.75 µm SOI n-MOSFET biased at Vds = Vgs = 1.5 V and
2 V
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Basic References
"Extended study of crosstalk in SOI-SIMOX substrates", A. Viviani, J.P. Raskin,
D. Flandre, J.P. Colinge, and D. Vanoenacker, Technical Digest of IEDM, pp. 713-716, 1995
A 1-GHz operational transconductance amplifier in SOI technology", J.P. Eggermont, D.
Flandre, R. Gillon and J.P. Colinge, IEEE International SOI Conference, 1995
"Modelling and optimising the SOI MOSFET in view of MMIC applications",
Proceedings of the European Microwave conference, Bologna, Italy, pp. 543-547, 1995
"Coupling effects in high-resistivity SIMOX substrates for VHF and microwave applications", J.P. Raskin, D. Vanhoenacker, J.P. Colinge and D. Flandre, IEEE International SOI Conference, 1995
"An efficient design tool for transmission line on SIMOX substrates", J.P.
Raskin, I. Huynen, R. Gillon, D. Vanhoenacker and J.P. Colinge, IEEE International SOI
Conference Proceedings, pp. 28-29, 1996
"A low-voltage, low-power microwave SOI MOSFET", J.P. Colinge, J. Chen, D.
Flandre, J.P. Raskin, R. Gillon and D. Vanhoenaecker, IEEE International SOI Conference
Proceedings, pp. 28-29, 1996
"Study of titanium silicide process for thin-film SOI devices, J. Chen and J.P.
Colinge, EMRS Spring Meeting, Symposium J, June 1996
"Direct extraction method for SOI MOSFET transistors parameters", J.P. Raskin,
R. Gillon, D. Vanhoenacker and J.P. Colinge, in "Silicon-on-Insulator Technology and
Devices", P.L.F. Hemment, S. Cristoloveanu, K. Izumi, T. Houston and S. Wilson
Editors, Electrochemical Society Proceedings Vol. 96-3, pp. 225-230, 1996
"Direct extraction method of SOI MOSFET transistors parameters", J.P Raskin, R.
Gillon, D. Vanhoenacker and J.P. Colinge, Proceedings of the 1996 IEEE International
Conference on Microelectronic Test Structures, Vol. 9, March 1996, pp. 191-194
J.-P. Eggermont, D. Flandre, J.-P. Raskin, J.-P. Colinge, "Potential and modeling of 1 µm - 1 GHz SOI CMOS OTAs", Eleectronics Letters, 33 (1997), pp. 774-775.
J. Chen, J.-P. Colinge, D. Flandre, R. Gillon, J.-P. Raskin and D. Vanhoenacker, "Comparison of TiSi2, CoSi2 and NiSi for thin-film Silicon-on-Insulator applications", Journal of Electrochemical Society, 144 (1997), pp. 2437-2442.
J.-P. Raskin, A. Viviani, D. Flandre, J.-P. Colinge, "Substrate crosstalk reduction using SOI technology", IEEE Trans. on Electron Devices, 44 (1997), pp. 2252-2261.
J.-P. Eggermont, D. Flandre, J.-P. Raskin, J.-P. Colinge, "Potential and modeling of 1µm SOI CMOS operational transconductance amplifiers for applications up to 1 GHz", IEEE Journal of Solid-State Circuits, 33 (1998), pp. 640-643.
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