Three-dimensional view and longitudinal cross-section of a GAA transistor
The Gate-All-Around (GAA) is an SOI MOSFET where the gate oxide and the polysilicon gate
are wrapped around the channel area. In these devices, volume inversion can be observed.
Excellent total-dose hardness and SEU-hardness are observed. The n-channel devices are
inversion-mode devices, and the p-channel transistors are accumulation-mode.
Three-dimensional view and longitudinal cross-section of a GAA transistor
SEM cross-section of a GAA transistor
Threshold voltage as a function of dose in 3µm x 3µm n- and p-channel GAA devices
irradiated with VG = 0V or 3V and source/drain grounded, or placed in the inverter
configuration with the gate continuously switched between 0V and 3V.
Normal cross-section per bit as a function of LETeff for bulk and SOI SRAMs:
A: bulk (Vdd = 5V)
B: bulk (Vdd = 5V)
C: 500nm-thick SOI (Vdd = 5V)
D: 150nm-thick SOI (Vdd = 5V)
E: 85nm-thick GAA (Vdd = 1.9V) (no SEU observed for higher supply voltages)
F: 85nm-thick GAA (Vdd = 1.9V) after geometrical correction
"Silicon-on-insulator gate-all-around device", J.P. Colinge, M.H. Gao, A. Romano, H. Maes, and C. Claeys, Technical Digest of IEDM, P. 595, 1990
"Radiation effects in gate-all-around structures", R.K. Lawrence, J.P.
Colinge, H.L. Hughes, and G.E. Davis, Proceedings IEEE International SOI Conference, 1991,
p. 80
P. Francis, A. Terao, D. Flandre, and F. Van de Wiele, "Characteristics of nMOS/GAA
(Gate-All-Around) transistors near threshold", Proc. ESSDERC'92, Microelectronics
Engineering, Elsevier, vol. 19, pp. 815-818, Leuven, 1992
P. Francis, A. Terao, and D. Flandre, "High temperature characteristics of GAA/SOI
transistors and circuits", IEEE Int. SOI Conf., pp 54-55, Ponte Vedra Beach, 1992
P. Francis, A. Terao, B. Gentinne, D. Flandre, and J.P. Colinge, "SOI technology for
high temperature applications", Tech. Digest of IEDM, pp. 353-356, 1992
P. Francis, A. Terao, D. Flandre, and F. Van de Wiele, "Weak inversion models for
nMOS Gate-All-Around (GAA) devices", Proc. ESSDERC'93, Editions Frontičres, pp.
621-624, Grenoble, 1993
D. Flandre, P. Francis, J.P. Colinge, and S. Cristoloveanu, "Comparison of
hot-carrier effects in thin-film SOI and Gate-All-Around accumulation-mode
p-MOSFETs", IEEE Int. SOI Conf., pp 160-161, Palm Springs, 1993
"Effects of Total-Dose Irradiation on Gate-All-Around (GAA) Devices", J.P.
Colinge and A. Terao, IEEE Transactions on Nuclear Science, vol. 40, p. 78, 1993
"Effects of Total-Dose Irradiation on Gate-All-Around (GAA) Devices", J.P.
Colinge and A. Terao, IEEE Transactions on Nuclear Science, vol. 40, p. 78, 1993
P. Francis, A. Terao, D. Flandre, and F. Van de Wiele, "Modeling of ultra-thin
double-gate nMOS/SOI transistors near and below threshold", IEEE Trans. on Electron
Devices, vol. 41, pp. 715-720, 1994
P. Francis, X. Baie, and J.P. Colinge, "Some properties of SOI Gate-All-Around
devices", SSDM Conf., pp. 277-279, Yokohama, 1994
P. Francis, A. Terao, D. Flandre, and F. Van de Wiele, "Moderate inversion models for
nMOS Gate-All-Around (GAA) devices", Solid-States Electronics , vol. 38, no. 1, pp.
171-176, 1995
P. Francis, D. Flandre, J.P. Colinge, and F. Van de Wiele, "Comparison of
self-heating effects in GAA and SOI devices", Proc. ESSDERC'95, Editions Frontičres,
pp. 225-228, Den Haag,1995
P. Francis, G. Berger, and J.P. Colinge, "SEU in SOI/GAA SRAMs", presented at
the IEEE Nuclear and Space Radiations Effects Conference, NSREC'95 . Published in IEEE
Trans. Nuclear Science, vol. 42, no. 6, Part I, pp. 603-613, 1995
"Temporal analysis of SEU in SOI/GAA SRAMs", P. Francis, J.P. Colinge and G.
Berger, IEEE Transactions on Nuclear Science, Vol. 42-6, pp.2127-2137, 1995
P. Francis, D. Flandre, J.-P. Colinge, F. Van de Wiele, "Comparison of self-heating
in effects in GAA and SOI devices", Microelectronics Reliability, 37
(1997), pp. 61-75.
T. Ernst, A. Vandooren, S. Cristoloveanu, J.-P. Colinge, D. Flandre, "Carrier lifetime extraction in fully depleted dual-gate SOI devices", IEEE Electron Device Letters, 20 (1999), pp. 209-211.
A. Vandooren, J.-P. Colinge, D. Flandre, "Gate-All-Around OTAs for Rad-hard and high-temperature analog applications", IEEE Trans. on Nuclear Science, 46 (1999), pp. 1242-1249.
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